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Sample text

TPLH measures the time between a change in inputs and the subsequent change in output from '0' to '1'. T PHL is a measure of the time taken for the outputs to change from HIGH to LOW, '1' to '0', in response to a change in the inputs: TPLH ~----~ut _____j___/ ' inputs change inputs change It is advantageous to have the fastest possible switching time. This will usually incur a higher power consumption, since this is inherent in a switching process. Speed and power consumption are often the most important factors in considering different logic technologies.

The propagation delay of an inverter can cause a momentary glitch on a circuit output. Consider f=A·B+B·C We shall look at the output state for inputs A = '1' and C = ' 1' and the input B changes from '1' to '0'. The circuit output is the OR of two terms, either of which is '1' when B changes, and so the output should not change at all. Combinational Logic Design 39 This is true in theory, but in practice B is derived from an in~rter whose input is B and when B changes from '1' to '0' then the output of the inverter, B, changes from '0' to '1' T PLH ns later.

The logic technology concerns the physical implementation of the switching circuits and offers a distinct set of performance characteristics. We shall first investigate the performance characteristics of particular interest in integrated circuit technology, then go on to look at switching circuits, and finally consider the logic technologies that are currently available. The performance characteristics can be developed from an ideal logic gate. The ideal inverter connects its output HIGH to the positive supply rail for a LOW input.

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